Publications

Conference Publications (Peer Reviewed)

2024

  • C. Drewes, O. Weng, A. Meza, A. Althoff, D. Kohlbrenner, R. Kastner, and D. Richmond, “Pentimento: Data Remanence in Cloud FPGAs,” in Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, New York, NY, USA, 2024, p. 862–878. doi:10.1145/3620665.3640355
    [BibTeX] [Download PDF] 
    @inproceedings{Drewes2024asplos,
author = {Drewes, Colin and Weng, Olivia and Meza, Andres and Althoff, Alric and Kohlbrenner, David and Kastner, Ryan and Richmond, Dustin},
title = {{Pentimento: Data Remanence in Cloud FPGAs}},
year = {2024},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
url = {https://doi.org/10.1145/3620665.3640355},
doi = {10.1145/3620665.3640355},
booktitle = {Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2},
pages = {862–878},
numpages = {17},
keywords = {conference},
author+an = {7=bold},
keywords = {conference, bias temperature instability, time-to-digital converter, side-channel, field programmable gate array},
location = {La Jolla, CA, USA},
series = {ASPLOS '24}
}

2023

  • C. Drewes, O. Weng, K. Ryan, B. Hunter, C. McCarty, R. Kastner, and D. Richmond, “Turn on, Tune in, Listen up: Maximizing Side-Channel Recovery in Time-to-Digital Converters,” in International Symposium on Field Programmable Gate Arrays, New York, NY, USA, 2023, pp. 111-122. doi:10.1145/3543622.3573193
    [BibTeX] [Download PDF] 
    @inproceedings{Drewes2023fpga,
title = {{Turn on, Tune in, Listen up: Maximizing Side-Channel Recovery in Time-to-Digital Converters}},
author = {Drewes, Colin and Weng, Olivia and Ryan, Keegan and Hunter, Bill and McCarty, Christopher and Kastner, Ryan and Richmond, Dustin},
booktitle = {{International Symposium on Field Programmable Gate Arrays}},
year = {2023},
series = {FPGA '23},
location = {Monterey, CA, USA},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
pages = {111-122},
numpages = {12},
keywords  = {conference},
author+an  = {7=bold},
doi = {10.1145/3543622.3573193},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/drewes2023fpga.pdf}
}
  • L. Cheng*, M. Ruttenberg*, D. C. Jung, D. Richmond, M. Taylor, M. Oskin, and C. Batten, “Beyond Static Parallel Loops: Supporting Dynamic Task Parallelism on Manycore Architectures with Software-Manged Scratchpad Memories,” in Architectural Support for Programming Languages and Operating Systems, New York, NY, USA, 2023. doi:10.1145/3582016.3582020
    [BibTeX] 
    @inproceedings{Cheng2023asplos,
title = {{Beyond Static Parallel Loops: Supporting Dynamic Task Parallelism on Manycore Architectures with Software-Manged Scratchpad Memories}},
author = {Cheng*, Lin and Ruttenberg*, Max and Jung, Dai Cheol and Richmond, Dustin and Taylor, Michael and Oskin, Mark and Batten, Christopher},
booktitle = {Architectural Support for Programming Languages and Operating Systems},
year = {2023},
series = {ASPLOS '23},
location = {Vancouver, BC, Canada},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
volume = {3},
keywords  = {conference},
author+an  = {4=bold},
doi = {10.1145/3582016.3582020}
}

2021

  • C. Drewes, S. Harris, W. Wang, R. Appen, O. Weng, R. Kastner, W. Hunter, C. McCarty, and D. Richmond, “A Tunable Dual-Edge Time-to-Digital Converter,” in International Symposium on Field-Programmable Custom Computing Machines, 2021, pp. 1-1. doi:10.1109/FCCM51124.2021.00040
    [BibTeX] [Download PDF] 
    @inproceedings{Drewes2021fccm,
title = {{A Tunable Dual-Edge Time-to-Digital Converter}},
author  = {Drewes, Colin and Harris, Steven and Wang, Winnie and Appen, Richard and Weng, Olivia and Kastner, Ryan and Hunter, William and McCarty, Christopher and Richmond, Dustin},
booktitle  = {International Symposium on Field-Programmable Custom Computing Machines},
year = {2021},
series  = {FCCM '21},
pages = {1-1},
organization  = {IEEE},
keywords  = {conference},
author+an  = {9=bold},
doi = {10.1109/FCCM51124.2021.00040},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/drewes2021fccm.pdf}
}
  • M. Gobulukoglu, C. Drewes, B. Hunter, R. Kastner, and D. Richmond, “Classifying Computations on Multi-Tenant FPGAs,” in International Symposium on Field-Programmable Gate Arrays, 2021, p. 227. doi:10.1109/DAC18074.2021.9586098
    [BibTeX] [Download PDF] 
    @inproceedings{Gobulukoglu2021fpga,
title = {{Classifying Computations on Multi-Tenant FPGAs}},
author  = {Gobulukoglu, Mustafa and Drewes, Colin and Hunter, Bill and Kastner, Ryan and Richmond, Dustin},
booktitle  = {International Symposium on Field-Programmable Gate Arrays},
year = {2021},
series  = {FPGA '21},
organization  = {ACM/SIGDA},
pages = {227},
keywords  = {conference},
author+an  = {5=bold},
doi = {10.1109/DAC18074.2021.9586098},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/gobulukoglu2021fpga.pdf}
}
  • A. Brahmakshatriya, E. Furst, V. A. Ying, C. Hsu, C. Hong, M. Ruttenberg, Y. Zhang, D. C. Jung, D. Richmond, M. B. Taylor, J. Shun, M. Oskin, D. Sanchez, and S. Amarasinghe, “Taming the Zoo: The Unified GraphIt Compiler Framework for Novel Architectures,” in International Symposium on Computer Architecture, 2021. doi:10.1109/ISCA52012.2021.00041
    [BibTeX] [Download PDF] 
    @inproceedings{Brahmakshatriya2021isca,
title = {{Taming the Zoo: The Unified GraphIt Compiler Framework for Novel Architectures}},
author  = {Brahmakshatriya, Ajay and Furst, Emily and Ying, Victor A and Hsu, Claire and Hong, Changwan and Ruttenberg, Max and Zhang, Yunming and Jung, Dai Cheol and Richmond, Dustin and Taylor, Michael B and Shun, Julian and Oskin, Mark and Sanchez, Daniel and Amarasinghe, Saman},
booktitle  = {International Symposium on Computer Architecture},
year = {2021},
series  = {ISCA '21},
organization  = {ACM},
keywords  = {conference},
author+an  = {9=bold},
doi = {10.1109/ISCA52012.2021.00041},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/brahmakshatriya2021isca.pdf}
}
  • M. Gobulukoglu, C. Drewes, B. Hunter, R. Kastner, and D. Richmond, “Classifying Computations on Multi-Tenant FPGAs,” in Design Automation Conference, 2021. doi:10.1109/DAC18074.2021.9586098
    [BibTeX] [Download PDF] 
    @inproceedings{Gobulukoglu2021dac,
title = {{Classifying Computations on Multi-Tenant FPGAs}},
author  = {Gobulukoglu, Mustafa and Drewes, Colin and Hunter, Bill and Kastner, Ryan and Richmond, Dustin},
booktitle  = {Design Automation Conference},
year = {2021},
series  = {DAC '21},
keywords  = {conference},
author+an  = {5=bold},
doi = {10.1109/DAC18074.2021.9586098},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/gobulukoglu2021dac.pdf}
}

2020

  • D. Petrisko, C. Zhao, S. Davidson, P. Gao, D. Richmond, and M. B. Taylor, “NoC Symbiosis,” in International Symposium on Networks-on-Chip, 2020, pp. 1-8. doi:10.1109/NOCS50636.2020.9241584
    [BibTeX] [Download PDF] 
    @inproceedings{Petrisko2020nocs,
title = {{NoC Symbiosis}},
author  = {Petrisko, Daniel and Zhao, Chun and Davidson, Scott and Gao, Paul and Richmond, Dustin and Taylor, Michael B},
booktitle  = {International Symposium on Networks-on-Chip},
year = {2020},
series  = {NOCS '20},
pages = {1-8},
organization  = {IEEE/ACM},
keywords  = {conference},
author+an  = {5=bold},
doi = {10.1109/NOCS50636.2020.9241584},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/petrisko2020nocs.pdf}
}
  • D. C. Jung, S. Davidson, C. Zhao, D. Richmond, and M. B. Taylor, “Ruche Networks: Wire-Maximal, No-Fuss NoCs,” in International Symposium on Networks-on-Chip, 2020, pp. 1-8. doi:10.1109/NOCS50636.2020.9241586
    [BibTeX] [Download PDF] 
    @inproceedings{Jung2020nocs,
title = {{Ruche Networks: Wire-Maximal, No-Fuss NoCs}},
author  = {Jung, Dai Cheol and Davidson, Scott and Zhao, Chun and Richmond, Dustin and Taylor, Michael B},
booktitle  = {International Symposium on Networks-on-Chip},
year = {2020},
series  = {NOCS '20},
pages = {1-8},
organization  = {IEEE/ACM},
keywords  = {conference},
author+an  = {4=bold},
doi = {10.1109/NOCS50636.2020.9241586},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/jung2020nocs.pdf}
}

2019

  • A. Rovinski, C. Zhao, K. Al-Hawaj, P. Gao, S. Xie, C. Torng, S. Davidson, A. Amarnath, L. Vega, B. Veluri, A. Rao, T. Ajayi, J. Puscar, S. Dai, R. Zhao, D. Richmond, Z. Zhang, I. Galton, C. Batten, M. Taylor, and R. Dreslinski, “A 1.4 GHz 695 Giga RISC-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS,” in Symposium on VLSI Circuits, 2019, p. C30-C31. doi:10.23919/VLSIC.2019.8778031
    [BibTeX] [Download PDF] 
    @inproceedings{Rovinski2019vlsi,
title = {{A 1.4 GHz 695 Giga {RISC-V} Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS}},
author  = {Rovinski, Austin and Zhao, Chun and Al-Hawaj, Khalid and Gao, Paul and Xie, Shaolin and Torng, Christopher and Davidson, Scott and Amarnath, Aporva and Vega, Luis and Veluri, Bandhav and Rao, Anuj and Ajayi, Tutu and Puscar, Julian and Dai, Steve and Zhao, Ritchie and Richmond, Dustin and Zhang, Zhiru and Galton, Ian and Batten, Christopher and Taylor, Michael and Dreslinski, Ronald},
booktitle  = {Symposium on VLSI Circuits},
year = {2019},
series  = {VLSI '19},
pages = {C30-C31},
organization  = {IEEE},
keywords  = {conference},
author+an  = {16=bold},
doi = {10.23919/VLSIC.2019.8778031},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/rovinski2019vlsi.pdf}
}

2018

  • D. Richmond, M. Barrow, and R. Kastner, “Everyone’s a Critic: A Tool for Exploring RISC-V Projects,” in International Conference on Field Programmable Logic and Applications, 2018, p. 260–2604. doi:10.1109/FPL.2018.00052
    [BibTeX] [Download PDF] 
    @inproceedings{Richmond2018fpl,
title = {{Everyone's a Critic: A Tool for Exploring {RISC-V} Projects}},
author  = {Richmond, Dustin and Barrow, Michael and Kastner, Ryan},
booktitle  = {International Conference on Field Programmable Logic and Applications},
year = {2018},
series  = {FPL '18},
pages = {260--2604},
organization  = {IEEE},
keywords  = {conference},
author+an  = {1=bold},
doi = {10.1109/FPL.2018.00052},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/richmond2018fpl.pdf}
}
  • B. Cain, Z. Merchant, I. Avendano, D. Richmond, and R. Kastner, “PynqCopter-An Open-source FPGA Overlay for UAVs,” in International Conference on Big Data, 2018, p. 2491–2498. doi:10.1109/BigData.2018.8622102
    [BibTeX] [Download PDF] 
    @inproceedings{Cain2018bd,
title = {{PynqCopter-An Open-source FPGA Overlay for UAVs}},
author  = {Cain, Brennan and Merchant, Zain and Avendano, Indira and Richmond, Dustin and Kastner, Ryan},
booktitle  = {International Conference on Big Data},
year = {2018},
series  = {Big Data '18},
pages = {2491--2498},
organization  = {IEEE},
keywords  = {conference},
author+an  = {4=bold},
doi = {10.1109/BigData.2018.8622102},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/cain2018bd.pdf}
}

2017

  • D. Lee, A. Althoff, D. Richmond, and R. Kastner, “A Streaming Clustering Approach using a Heterogeneous System for Big Data Analysis,” in International Conference on Computer-Aided Design, 2017, p. 699–706. doi:10.1109/ICCAD.2017.8203845
    [BibTeX] [Download PDF] 
    @inproceedings{Lee2017iccad,
title = {{A Streaming Clustering Approach using a Heterogeneous System for Big Data Analysis}},
author  = {Lee, Dajung and Althoff, Alric and Richmond, Dustin and Kastner, Ryan},
booktitle  = {International Conference on Computer-Aided Design},
year = {2017},
series  = {ICCAD '17},
pages = {699--706},
organization  = {IEEE/ACM},
keywords  = {conference},
author+an  = {3=bold},
doi = {10.1109/ICCAD.2017.8203845},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/lee2017iccad.pdf}
}

2016

  • J. Matai, D. Richmond, D. Lee, Z. Blair, Q. Wu, A. Abazari, and R. Kastner, “Resolve: Generation of High-Performance Sorting Architectures for High-level Synthesis,” in International Symposium on Field-Programmable Gate Arrays, 2016, p. 195–204. doi:10.1145/2847263.2847268
    [BibTeX] [Download PDF] 
    @inproceedings{Matai2016fpga,
title = {{Resolve: Generation of High-Performance Sorting Architectures for High-level Synthesis}},
author  = {Matai, Janarbek and Richmond, Dustin and Lee, Dajung and Blair, Zac and Wu, Qiongzhi and Abazari, Amin and Kastner, Ryan},
booktitle  = {International Symposium on Field-Programmable Gate Arrays},
series  = {FPGA '16},
pages = {195--204},
year = {2016},
organization  = {ACM/SIGDA},
keywords  = {conference},
author+an  = {2=bold},
doi = {10.1145/2847263.2847268},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/matai2016fpga.pdf}
}
  • D. Richmond, J. Blackstone, M. Hogains, K. Thai, and R. Kastner, “Tinker: Generating Custom Memory Architectures for Altera’s OpenCL Compiler,” in International Symposium on Field-Programmable Custom Computing Machines, 2016, p. 21–24. doi:10.1109/FCCM.2016.13
    [BibTeX] [Download PDF] 
    @inproceedings{Richmond2016fpl,
title = {{Tinker: Generating Custom Memory Architectures for Altera's OpenCL Compiler}},
author  = {Richmond, Dustin and Blackstone, Jeremy and Hogains, Matthew and Thai, Kevin and Kastner, Ryan},
booktitle  = {International Symposium on Field-Programmable Custom Computing Machines},
year = {2016},
series  = {FCCM '16},
pages = {21--24},
organization  = {IEEE},
keywords  = {conference},
author+an  = {1=bold},
doi = {10.1109/FCCM.2016.13},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/richmond2016fpl.pdf}
}

2014

  • Q. Gautier, A. Shearer, J. Matai, D. Richmond, P. Meng, and R. Kastner, “Real-time 3D Reconstruction for FPGAs: A Case Study for Evaluating the Performance, Area, and Programmability Trade-offs of the Altera OpenCL SDK,” in International Conference on Field-Programmable Technology, 2014, pp. 326-329. doi:10.1109/FPT.2014.7082810
    [BibTeX] [Download PDF] 
    @inproceedings{Gautier2014fpt,
title = {{Real-time 3D Reconstruction for FPGAs: A Case Study for Evaluating the Performance, Area, and Programmability Trade-offs of the Altera OpenCL SDK}},
author  = {Gautier, Quentin and Shearer, Alexandria and Matai, Janarbek and Richmond, Dustin and Meng, Pingfan and Kastner, Ryan},
booktitle  = {International Conference on Field-Programmable Technology},
year = {2014},
series  = {FPT '14},
pages = {326-329},
organization  = {IEEE},
keywords  = {conference},
author+an  = {4=bold},
doi = {10.1109/FPT.2014.7082810},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/gautier2014fpt.pdf}
}

2013

  • D. Richmond, R. Kastner, A. Irturk, and J. McGarry, “A FPGA Design for High-Speed Feature Extraction from a Compressed Measurement Stream,” in International Conference on Field programmable Logic and Applications, 2013, p. 1–8. doi:10.1109/FPL.2013.6645527
    [BibTeX] [Download PDF] 
    @inproceedings{Richmond2013fpl,
title = {{A FPGA Design for High-Speed Feature Extraction from a Compressed Measurement Stream}},
author  = {Richmond, Dustin and Kastner, Ryan and Irturk, Ali and McGarry, John},
booktitle  = {International Conference on Field programmable Logic and Applications},
year = {2013},
series  = {FPL '13},
pages = {1--8},
organization  = {IEEE},
keywords  = {conference},
author+an  = {1=bold},
doi = {10.1109/FPL.2013.6645527},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/richmond2013fpl.pdf}
}

2012

  • E. Brossard, D. Richmond, J. Green, C. Ebeling, L. Ruzzo, C. Olson, and S. Hauck, “A Model for Programming Data-Intensive Applications on FPGAs: A Genomics Case Study,” in Symposium on Application Accelerators in High Performance Computing, 2012, p. 84–93. doi:10.1109/SAAHPC.2012.18
    [BibTeX] [Download PDF] 
    @inproceedings{Brossard2012saahpc,
title = {{A Model for Programming Data-Intensive Applications on FPGAs: A Genomics Case Study}},
author  = {Brossard, Elliott and Richmond, Dustin and Green, Joshua and Ebeling, Carl and Ruzzo, Larry and Olson, Corey and Hauck, Scott},
booktitle  = {Symposium on Application Accelerators in High Performance Computing},
year = {2012},
series  = {SAAHPC '12},
pages = {84--93},
organization  = {IEEE},
keywords  = {conference},
author+an  = {2=bold},
doi = {10.1109/SAAHPC.2012.18},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/brossard2012saahpc.pdf}
}

Journal Publications (Peer Reviewed)

2024

  • C. Drewes, T. Sheaves, O. Weng, K. Ryan, B. Hunter, C. McCarty, R. Kastner, and D. Richmond, “Turn on, Tune in, Listen up: Maximizing Side-Channel Recovery in Cross-Platform Time-to-Digital Converters,” ACM Trans. Reconfigurable Technol. Syst., 2024. doi:10.1145/3666092
    [BibTeX] [Download PDF] 
    @article{Drewes2024trets,
author = {Drewes, Colin and Sheaves, Tyler and Weng, Olivia and Ryan, Keegan and Hunter, Bill and McCarty, Christopher and Kastner, Ryan and Richmond, Dustin},
title = {Turn on, Tune in, Listen up: Maximizing Side-Channel Recovery in Cross-Platform Time-to-Digital Converters},
year = {2024},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
issn = {1936-7406},
url = {https://doi.org/10.1145/3666092},
doi = {10.1145/3666092},
keywords = {journal},
journal = {ACM Trans. Reconfigurable Technol. Syst.},
author+an  = {8=bold},
month = {jun}
}

2021

  • L. Cheng, P. Pan, Z. Zhao, K. Ranjan, J. Weber, P. Ivanov, B. Veluri, S. B. Ehsani, M. Ruttenberg, D. Cheol Jung, D. Richmond, M. B. Taylor, Z. Zhang, and C. Batten, “A Tensor Processing Framework for CPU-Manycore Heterogeneous Systems,” Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41, iss. 6, pp. 1620-1635, 2021. doi:10.1109/TCAD.2021.3103825
    [BibTeX] [Download PDF] 
    @article{Cheng2021tcad,
title = {{A Tensor Processing Framework for CPU-Manycore Heterogeneous Systems}},
author  = {Cheng, Lin and Pan, Peitian and Zhao, Zhongyuan and Ranjan, Krithik and Weber, Jack and Ivanov, Preslav and Veluri, Bandhav and Ehsani, Sayed Borna
and Ruttenberg, Max and Cheol Jung, Dai and Richmond, Dustin and Taylor, Michael B and Zhang, Zhiru and Batten, Christopher},
journal  = {Transactions on Computer-Aided Design of Integrated Circuits and Systems},
year = {2021},
volume = {41},
number = {6},
pages = {1620-1635},
publisher  = {IEEE},
keywords  = {journal},
author+an  = {11=bold},
doi = {10.1109/TCAD.2021.3103825},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/cheng2021tcad.pdf}
}

2020

  • M. B. Taylor, L. Vega, M. Khazraee, I. Magaki, S. Davidson, and D. Richmond, “ASIC Clouds: Specializing the Datacenter for Planet-Scale Applications,” Communications of the ACM, vol. 63, pp. 103-109, 2020. doi:10.1145/3399734
    [BibTeX] [Download PDF] 
    @article{Taylor2020cacm,
title = {{ASIC Clouds: Specializing the Datacenter for Planet-Scale Applications}},
author  = {Taylor, Michael B and Vega, Luis and Khazraee, Moein and Magaki, Ikuo and Davidson, Scott and Richmond, Dustin},
journal  = {Communications of the ACM},
year = {2020},
publisher  = {ACM},
volume  = {63},
pages = {103-109},
keywords  = {journal},
author+an  = {6=bold},
doi = {10.1145/3399734},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/taylor2020cacm.pdf}
}

2019

  • A. Rovinski, C. Zhao, K. Al-Hawaj, P. Gao, S. Xie, C. Torng, S. Davidson, A. Amarnath, L. Vega, B. Veluri, A. Rao, T. Ajayi, J. Puscar, S. Dai, R. Zhao, D. Richmond, Z. Zhang, I. Galton, C. Batten, M. Taylor, and R. Dreslinski, “Evaluating Celerity: A 16nm 695 Giga-RISC-V Instructions/s Manycore Processor with Synthesizable PLL,” Solid-State Circuits Letters, vol. 2, iss. 12, pp. 289-292, 2019. doi:10.1109/LSSC.2019.2953847
    [BibTeX] [Download PDF] 
    @article{Rovinski2019issc,
title = {{Evaluating Celerity: A 16nm 695 Giga-{RISC-V} Instructions/s Manycore Processor with Synthesizable PLL}},
author  = {Rovinski, Austin and Zhao, Chun and Al-Hawaj, Khalid and Gao, Paul and Xie, Shaolin and Torng, Christopher and Davidson, Scott and Amarnath, Aporva and Vega, Luis and Veluri, Bandhav and Rao, Anuj and Ajayi, Tutu and Puscar, Julian and Dai, Steve and Zhao, Ritchie and Richmond, Dustin and Zhang, Zhiru and Galton, Ian and Batten, Christopher and Taylor, Michael and Dreslinski, Ronald},
journal  = {Solid-State Circuits Letters},
year = {2019},
publisher  = {IEEE},
volume  = {2},
number  = {12},
pages = {289-292},
keywords  = {journal},
author+an  = {16=bold},
doi = {10.1109/LSSC.2019.2953847},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/rovinski2019issc.pdf}
}

2018

  • D. Richmond, A. Althoff, and R. Kastner, “Synthesizable Higher-Order Functions for C++,” Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 37, iss. 11, p. 2835–2844, 2018. doi:10.1109/TCAD.2018.2857259
    [BibTeX] [Download PDF] 
    @article{Richmond2018tcad,
title = {{Synthesizable Higher-Order Functions for {C++}}},
author  = {Richmond, Dustin and Althoff, Alric and Kastner, Ryan},
journal  = {Transactions on Computer-Aided Design of Integrated Circuits and Systems},
year = {2018},
publisher  = {IEEE},
volume  = {37},
number  = {11},
pages = {2835--2844},
keywords  = {journal},
author+an  = {1=bold},
doi = {10.1109/TCAD.2018.2857259},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/richmond2018tcad.pdf}
}

2016

  • T. G. Garrison, D. Richmond, P. Naughton, E. Lo, S. Trinh, Z. Barnes, A. Lin, C. Schurgers, R. Kastner, and S. E. Newman, “Tunnel Vision: documenting excavations in three dimensions with Lidar technology,” Advances in Archaeological Practice, vol. 4, iss. 2, p. 192–204, 2016. doi:10.7183/2326-3768.4.2.192
    [BibTeX] [Download PDF] 
    @article{Garrison2016aap,
title = {{Tunnel Vision: documenting excavations in three dimensions with Lidar technology}},
author  = {Garrison, Thomas G and Richmond, Dustin and Naughton, Perry and Lo, Eric and Trinh, Sabrina and Barnes, Zachary and Lin, Albert and Schurgers, Curt and Kastner, Ryan and Newman, Sarah E},
journal  = {Advances in Archaeological Practice},
year = {2016},
publisher  = {Cambridge University Press},
volume  = {4},
number  = {2},
pages = {192--204},
keywords  = {journal},
author+an  = {2=bold},
doi = {10.7183/2326-3768.4.2.192},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/garrison2016aap.pdf}
}

2015

  • M. Jacobsen, D. Richmond, M. Hogains, and R. Kastner, “RIFFA 2.1: A Reusable Integration Framework for FPGA Accelerators,” Transactions on Reconfigurable Technology and Systems, vol. 8, iss. 4, 2015. doi:10.1145/2815631
    [BibTeX] [Download PDF] 
    @article{Jacobsen2015trets,
title = {{RIFFA 2.1: A Reusable Integration Framework for FPGA Accelerators}},
author  = {Jacobsen, Matthew and Richmond, Dustin and Hogains, Matthew and Kastner, Ryan},
journal  = {Transactions on Reconfigurable Technology and Systems},
year = {2015},
publisher  = {ACM},
volume  = {8},
number  = {4},
numpages  = {23},
keywords  = {journal},
author+an  = {2=bold},
doi = {10.1145/2815631},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/jacobsen2015trets.pdf}
}

2011

  • D. Richmond, Q. Zhang, G. Cao, and D. N. Weiss, “Pressureless nanoimprinting of anatase $TiO_2$ precursor films,” Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena, vol. 29, iss. 2, p. 5, 2011. doi:10.1116/1.3562955
    [BibTeX] [Download PDF] 
    @article{Richmond2011jvst,
title = {{Pressureless nanoimprinting of anatase {$TiO_2$} precursor films}},
author  = {Richmond, Dustin and Zhang, Qifeng and Cao, Guozhong and Weiss, Dirk N},
journal  = {Journal of Vacuum Science \& Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena},
year = {2011},
publisher  = {AVS},
volume  = {29},
number  = {2},
pages = {5},
keywords  = {journal},
author+an  = {1=bold},
doi = {10.1116/1.3562955},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/richmond2011jvst.pdf}
}
  • D. N. Weiss, B. G. Lee, D. Richmond, W. Nemeth, Q. Wang, D. A. Keszler, and H. M. Branz, “Diffractive light trapping in crystal-silicon films: experiment and electromagnetic modeling,” Applied Optics, vol. 50, iss. 29, p. 5728–5734, 2011. doi:10.1364/AO.50.005728
    [BibTeX] [Download PDF] 
    @article{Weiss2011ao,
title = {{Diffractive light trapping in crystal-silicon films: experiment and electromagnetic modeling}},
author  = {Weiss, Dirk N and Lee, Benjamin G and Richmond, Dustin and Nemeth, William and Wang, Qi and Keszler, Douglas A and Branz, Howard M},
journal  = {Applied Optics},
year = {2011},
publisher  = {Optical Society of America},
volume  = {50},
number  = {29},
pages = {5728--5734},
keywords  = {journal},
author+an  = {3=bold},
doi = {10.1364/AO.50.005728},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/weiss2011ao.pdf}
}

Technical Reports

2016

  • D. Richmond, M. Jacobsen, and K. Ryan, “RIFFA 2.2.2 Documentation,” , 2016.
    [BibTeX] [Download PDF] 
    @manual{Richmond2015riffa222,
title = {{RIFFA 2.2.2 Documentation}},
author  = {Richmond, Dustin and Jacobsen, Matthew and Kasnter Ryan},
organization  = {University of California, San Diego},
address  = {San Diego, California, USA},
year = {2016},
author+an  = {1=bold},
keywords  = {techreport},
url = {http://www.dustinrichmond.com/wp-content/reports/pdf/riffa_2_2_2.pdf}
}

2015

  • D. Richmond, M. Jacobsen, and K. Ryan, “RIFFA 2.2.1 Documentation,” , 2015.
    [BibTeX] [Download PDF] 
    @manual{Richmond2015riffa221,
title = {{RIFFA 2.2.1 Documentation}},
author  = {Richmond, Dustin and Jacobsen, Matthew and Kasnter Ryan},
organization  = {University of California, San Diego},
address  = {San Diego, California, USA},
year = {2015},
author+an  = {1=bold},
keywords  = {techreport},
url = {http://www.dustinrichmond.com/wp-content/reports/pdf/riffa_2_2_1.pdf}
}
  • S. Trinh, D. Richmond, P. Naughton, E. Lo, D. Dantas, D. Meyer, Lin Albert, C. Schurgers, R. Kastner, and T. Garrison, “La documentación en 3D de excavaciones y artefactos arqueológicos,” , 2015.
    [BibTeX] [Download PDF] 
    @manual{Garrison2015mesoweb,
title = {{La documentaci\'{o}n en 3D de excavaciones y artefactos arqueol\'{o}gicos}},
author  = {Trinh, Sabrina and Richmond, Dustin and Naughton, Perry and Lo, Eric and Dantas, David and Meyer, Dominique and Lin, Albert, and Schurgers, Curt and Kastner, Ryan and Garrison, Thomas},
organization  = {Instituto de Antropolog\'{i}a e Historia},
address  = {Guatemala City, Guatemala},
year = {2015},
author+an  = {2=bold},
keywords  = {techreport},
url = {http://www.mesoweb.com/zotz/El-Zotz-2014.pdf}
}

2014

  • D. Richmond, M. Jacobsen, and K. Ryan, “RIFFA 2.2.0 Documentation,” , 2014.
    [BibTeX] [Download PDF] 
    @manual{Richmond2015riffa220,
title = {{RIFFA 2.2.0 Documentation}},
author  = {Richmond, Dustin and Jacobsen, Matthew and Kasnter Ryan},
organization  = {University of California, San Diego},
address  = {San Diego, California, USA},
year = {2014},
author+an  = {1=bold},
keywords  = {techreport},
url = {http://www.dustinrichmond.com/wp-content/reports/pdf/riffa_2_2_0.pdf}
}

Workshop Papers

2014

  • J. Matai, D. Richmond, D. Lee, and R. Kastner, “Enabling FPGAs for the Masses,” , 2014. doi:10.48550/arXiv.1408.5870
    [BibTeX] [Download PDF] 
    @inproceeedings{Matai2014fsp,
title = {{Enabling FPGAs for the Masses}},
author  = {Matai, Janarbek and Richmond, Dustin and Lee, Dajung and Kastner, Ryan},
booktitle  = {First International Workshop on FPGAs for Software Programmers},
series  = {FSP '14},
year = {2014},
keywords  = {workshop},
author+an  = {2=bold},
doi = {10.48550/arXiv.1408.5870},
url = {http://www.dustinrichmond.com/wp-content/papers/pdf/matai2014fsp.pdf}
}

Preprints

2024

  • R. Zhu, Y. Zhang, E. Sifferman, T. Sheaves, Y. Wang, D. Richmond, P. Zhou, and J. K. Eshraghian, Scalable MatMul-free Language Modeling, 2024.
    [BibTeX] 
    @misc{zhu2024scalable,
title = {Scalable MatMul-free Language Modeling},
author = {Rui-Jie Zhu and Yu Zhang and Ethan Sifferman and Tyler Sheaves and Yiqiao Wang and Dustin Richmond and Peng Zhou and Jason K. Eshraghian},
year = {2024},
eprint = {2406.02528},
archivePrefix = {arXiv},
keywords  = {preprint},
author+an  = {6=bold}
}